1. Field of the Invention
The present invention relates to a boost circuit of a semiconductor integrated circuit, and in particular to a boost circuit capable of outputting a boost voltage decreased in dispersion by simulatively detecting outputs of boost circuit units and controlling the number of circuit units to be activated among a plurality of boost circuit units connected in parallel.
2. Description of the Related Art
Recently in a semiconductor memory device such as a flash memory, reduction of the current consumption of a whole memory chip is demanded as the power supply voltage required to actuate the semiconductor memory device is lowered. Therefore, a voltage which is needed within the memory and which is higher than the power supply voltage needs to be generated by raising the power supply voltage to a desired high voltage within the chip. For such a purpose, a boost circuit is used.
FIG. 1 is a block diagram showing a conventional boost circuit. In this boost circuit, a boost input voltage B.sub.BOOST is inverted by an inverter 40. The inverted voltage is input to a transistor 41, and output as an amplified voltage V.sub.BOOST via capacitance 42. The transistor 41 is controlled at its gate by a level shifter (L/S) 43. On the basis of the input voltage B.sub.BOOST and the output voltage V.sub.BOOST, the L/S 43 controls the gate voltage of the transistor 41.
However, this conventional boost circuit has a problem that the output voltage is largely varied due to variations in the power supply voltage and external temperature and dispersions in process factors of the chip.
Heretofore, therefore, as shown FIG. 2, there has been proposed such a boost circuit that the boost circuit shown in FIG. 1 is used as each of boost circuit units 32 and 33 and the boost circuit units 32 and 33, are connected in parallel between an input terminal 31 and an output terminal 38.
In this conventional boost circuit, the input terminal 31 is input with a boost input voltage ATDBST2. Between the input terminal 31 and the boost circuit unit 32, an inverter 34 is connected. Between the input terminal 31 and the boost circuit unit 33, a NAND circuit 35 is connected. A power supply voltage detection circuit 37 is connected to the other input terminal of the NAND circuit 35. As a result, the boost input voltage ATDBST2 and an output signal of the power supply voltage detection circuit 37 are input to the NAND circuit 35. A logical product of them is input to the boost circuit unit 33. The power supply voltage detection circuit 37 outputs a "high" signal when a power supply voltage Vcc is lower than a predetermined voltage V.sub.LIMIT, and outputs a "low" signal when the power supply voltage Vcc is equal to or higher than V.sub.LIMIT.
Furthermore, between the output terminal 38 and a ground terminal, a capacitor 36 having capacitance C.sub.L is connected. And an amplified voltage V.sub.BOOST is output from the output terminal 38.
Operation of this conventional boost circuit will now be described. The power supply voltage detection circuit 37 outputs a "high" signal when a power supply voltage Vcc is lower than a predetermined voltage V.sub.LIMIT. Via the NAND circuit 35, the boost input voltage ATDBST2 is input to the boost circuit unit 33 as well. The boost circuit unit 33 is thus activated. In this case, the boost circuit operates by using two circuit units, i.e., the boost circuit unit 32 and the boost circuit unit 33.
The power supply voltage detection circuit 37 outputs a "low" signal when the power supply voltage Vcc is equal to or higher than a predetermined voltage V.sub.LIMIT. The boost input voltage ADBST2 is not input to the boost circuit unit 33. Accordingly, the boost circuit unit 33 ceases its operation. In this case, the boost circuit operates with one boost circuit unit, i.e., the boost circuit unit 32.
By controlling the number of activated boost circuit units to be activated according to the variation of the power supply voltage, therefore, the variation of the output of the boost circuit can be suppressed.
In the above-described conventional boost circuit, however, only the variation of the power supply voltage is detected. Although it is possible to prevent the variation of the boost circuit output caused by the variation of the power supply voltage, therefore, there has been a problem that variation of the boost voltage itself caused by dispersion of the process condition and the variation of the external temperature cannot be suppressed.